Regviz

Espressif Systems /ESP32-S2 /RMT /INT_ENA

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as INT_ENA

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-S2/RMT/INT_ENA#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH3_TX_END)CH3_TX_END 0 (CH2_RX_END)CH2_RX_END 0 (CH3_ERR)CH3_ERR 0 (CH2_TX_THR_EVENT)CH2_TX_THR_EVENT 0 (CH0_TX_LOOP)CH0_TX_LOOP

Description

Interrupt enable bits

Fields

CH2_TX_END

The interrupt enabled bit for CH2_TX_END_INT.
CH0_TX_END

The interrupt enabled bit for CH0_TX_END_INT.
CH1_TX_END

The interrupt enabled bit for CH1_TX_END_INT.
CH3_TX_END

The interrupt enabled bit for CH3_TX_END_INT.
CH3_RX_END

The interrupt enabled bit for CH3_RX_END_INT.
CH0_RX_END

The interrupt enabled bit for CH0_RX_END_INT.
CH1_RX_END

The interrupt enabled bit for CH1_RX_END_INT.
CH2_RX_END

The interrupt enabled bit for CH2_RX_END_INT.
CH2_ERR

The interrupt enabled bit for CH2_ERR_INT.
CH1_ERR

The interrupt enabled bit for CH1_ERR_INT.
CH0_ERR

The interrupt enabled bit for CH0_ERR_INT.
CH3_ERR

The interrupt enabled bit for CH3_ERR_INT.
CH1_TX_THR_EVENT

The interrupt enabled bit for CH1_TX_THR_EVENT_INT.
CH0_TX_THR_EVENT

The interrupt enabled bit for CH0_TX_THR_EVENT_INT.
CH3_TX_THR_EVENT

The interrupt enabled bit for CH3_TX_THR_EVENT_INT.
CH2_TX_THR_EVENT

The interrupt enabled bit for CH2_TX_THR_EVENT_INT.
CH2_TX_LOOP

The interrupt enabled bit for CH2_TX_LOOP_INT.
CH3_TX_LOOP

The interrupt enabled bit for CH3_TX_LOOP_INT.
CH1_TX_LOOP

The interrupt enabled bit for CH1_TX_LOOP_INT.
CH0_TX_LOOP

The interrupt enabled bit for CH0_TX_LOOP_INT.

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/espressif/svd